Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1585

LTR—Load Task Register (Continued)
#GP(selector)
#NP(selector)
#SS(0)
#PF(fault-code)
Real Address Mode Exceptions
#UD
Virtual 8086 Mode Exceptions
#UD
Volume 4: Base IA-32 Instruction Reference
If the source selector points to a segment that is not a TSS or to one
for a task that is already busy.
If the selector points to LDT or is beyond the GDT limit.
If the TSS is marked not present.
If a memory operand effective address is outside the SS segment
limit.
If a page fault occurs.
The LTR instruction is not recognized in real address mode.
The LTR instruction is not recognized in virtual 8086 mode.
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