Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1535

IRET/IRETD—Interrupt Return (Continued)
ELSE (* OperandSize = 16 *)
FI;
IF tempEFLAGS(VM) = 1 AND CPL=0
THEN
ELSE
FI;
RETURN-FROM-VIRTUAL-8086-MODE:
(* Processor is in virtual-8086 mode when IRET is executed and stays in virtual-8086 mode *)
IF CR4.VME = 0
THEN
IF IOPL=3 (* Virtual mode: PE=1, VM=1, IOPL=3 *)
FI;
ELSE (*VME is 1*)
IF IOPL = 3
Volume 4: Base IA-32 Instruction Reference
THEN #SS(0)
FI;
tempEIP  Pop();
tempCS  Pop();
tempEFLAGS  Pop();
IF top 6 bytes of stack are not within stack limits
THEN #SS(0);
FI;
tempEIP  Pop();
tempCS  Pop();
tempEFLAGS  Pop();
tempEIP  tempEIP AND FFFFH;
tempEFLAGS  tempEFLAGS AND FFFFH;
GOTO RETURN-TO-VIRTUAL-8086-MODE;
(* PE=1, VM=1 in EFLAGS image *)
GOTO PROTECTED-MODE-RETURN;
(* PE=1, VM=0 in EFLAGS image *)
THEN
IF OperandSize = 32
THEN
IF top 12 bytes of stack not within stack limits THEN #SS(0); FI;
IF instruction pointer not within code segment limits THEN #GP(0); FI;
EIP  Pop();
CS  Pop(); (* 32-bit pop, high-order 16-bits discarded *)
EFLAGS  Pop();
(*VM,IOPL,VIP,and VIF EFLAGS bits are not modified by pop *)
ELSE (* OperandSize = 16 *)
IF top 6 bytes of stack are not within stack limits THEN #SS(0); FI;
IF instruction pointer not within code segment limits THEN #GP(0); FI;
EIP  Pop();
EIP  EIP AND 0000FFFFH;
CS  Pop(); (* 16-bit pop *)
EFLAGS[15:0]  Pop(); (* IOPL in EFLAGS is not modified by pop *)
FI;
ELSE #GP(0); (* trap to virtual-8086 monitor: PE=1, VM=1, IOPL<3 *)
THEN
IF OperandSize = 32
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