Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1205

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4.2.2.3
Integer Compare – Immediate-Register
40
A8
Instruction
cmp.lt
cmp.ltu
cmp.eq
cmp.lt.unc
cmp.ltu.unc
cmp.eq.unc
cmp.eq.and
cmp.eq.or
cmp.eq.or.andcm
cmp.ne.and
cmp.ne.or
cmp.ne.or.andcm
cmp4.lt
cmp4.ltu
cmp4.eq
cmp4.lt.unc
cmp4.ltu.unc
cmp4.eq.unc
cmp4.eq.and
cmp4.eq.or
cmp4.eq.or.andcm
cmp4.ne.and
cmp4.ne.or
cmp4.ne.or.andcm
4.2.3
Multimedia
All multimedia ALU instructions are encoded within major opcode 8 using two 1-bit
opcode extension fields in bits 36 (z
bits 35:34 (x
4-bit opcode extension field in bits 32:29 (x
28:27 (x
Table 4-12.
Opcode
Bits 40:37
8
3:306
37 36 35 34 33 32
C - E
s x
t
p
2
a
2
4
1
2
1
6
p
, p
= imm
1
2
) as shown in
Table
2a
) as shown in
Table 4-13 on page
2b
Multimedia ALU 2-bit+1-bit Opcode Extensions
x
z
2a
a
Bits 35:34
Bit 36
Bit 33
0
1
1
27 26
20 19
r
imm
3
7
Operands
Opcode
C
D
E
C
D
E
C
D
E
C
D
E
, r
8
3
C
D
E
C
D
E
C
D
E
C
D
E
) and 33 (z
) and a 2-bit opcode extension field in
a
b
4-12. The multimedia ALU instructions also have a
), and a 2-bit opcode extension field in bits
4
3:307.
z
b
0
Multimedia ALU Size 1
1
Multimedia ALU Size 2
0
Multimedia ALU Size 4
1
13 12 11
6 5
c
p
7b
1
7
1
6
Extension
x
t
2
a
0
2
1
0
3
1
(Table
4-13)
(Table
4-14)
(Table
4-15)
Volume 3: Instruction Formats
0
qp
6
c
0
1
0
1
0
1
0
1

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