Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1667

SHRD—Double Precision Shift Right (Continued)
Flags Affected
If the count is 1 or greater, the CF flag is filled with the last bit shifted out of the
destination operand and the SF, ZF, and PF flags are set according to the value of the
result. For a 1-bit shift, the OF flag is set if a sign change occurred; otherwise, it is
cleared. For shifts greater than 1 bit, the OF flag is undefined. If a shift occurs, the AF
flag is undefined. If the count operand is 0, the flags are not affected. If the count is
greater than the operand size, the flags are undefined.
Additional Itanium System Environment Exceptions
Itanium Reg Faults NaT Register Consumption Abort.
Itanium Mem FaultsVHPT Data Fault, Nested TLB Fault, Data TLB Fault, Alternate Data
Protected Mode Exceptions
#GP(0)
#SS(0)
#PF(fault-code)
#AC(0)
Real Address Mode Exceptions
#GP
#SS
Virtual 8086 Mode Exceptions
#GP(0)
#SS(0)
#PF(fault-code)
#AC(0)
Volume 4: Base IA-32 Instruction Reference
TLB Fault, Data Page Not Present Fault, Data NaT Page Consumption
Abort, Data Key Miss Fault, Data Key Permission Fault, Data Access
Rights Fault, Data Access Bit Fault, Data Dirty Bit Fault
If the destination is located in a nonwritable segment.
If a memory operand effective address is outside the CS, DS, ES, FS,
or GS segment limit.
If the DS, ES, FS, or GS register contains a null segment selector.
If a memory operand effective address is outside the SS segment
limit.
If a page fault occurs.
If alignment checking is enabled and an unaligned memory
reference is made while the current privilege level is 3.
If a memory operand effective address is outside the CS, DS, ES, FS,
or GS segment limit.
If a memory operand effective address is outside the SS segment
limit.
If a memory operand effective address is outside the CS, DS, ES, FS,
or GS segment limit.
If a memory operand effective address is outside the SS segment
limit.
If a page fault occurs.
If alignment checking is enabled and an unaligned memory
reference is made.
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