Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1518

INS/INSB/INSW/INSD—Input from Port to String (Continued)
Additional Itanium System Environment Exceptions
Itanium Reg Faults NaT Register Consumption Abort.
Itanium Mem FaultsVHPT Data Fault, Nested TLB Fault, Data TLB Fault, Alternate Data
IA_32_Exception
IA_32_Exception
#GP(0)
Protected Mode Exceptions
#GP(0)
#PF(fault-code)
#AC(0)
Real Address Mode Exceptions
#GP
#SS
Virtual 8086 Mode Exceptions
#GP(0)
#PF(fault-code)
#AC(0)
4:216
TLB Fault, Data Page Not Present Fault, Data NaT Page Consumption
Abort, Data Key Miss Fault, Data Key Permission Fault, Data Access
Rights Fault, Data Access Bit Fault, Data Dirty Bit Fault
Debug traps for data breakpoints and single step
Alignment faults
Referenced Port is to an unimplemented virtual address or PSR.dt is
zero.
If the CPL is greater than (has less privilege) the I/O privilege level
(IOPL) and any of the corresponding I/O permission bits in TSS for
the I/O port being accessed is 1 and when CFLG.io is 1.
If the destination is located in a nonwritable segment.
If an illegal memory operand effective address in the ES segments
is given.
If a page fault occurs.
If alignment checking is enabled and an unaligned memory
reference is made while the current privilege level is 3.
If a memory operand effective address is outside the CS, DS, ES, FS,
or GS segment limit.
If a memory operand effective address is outside the SS segment
limit.
If any of the I/O permission bits in the TSS for the I/O port being
accessed is 1.
If a page fault occurs.
If alignment checking is enabled and an unaligned memory
reference is made.
Volume 4: Base IA-32 Instruction Reference