Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1638

RDTSC—Read Time-Stamp Counter (Continued)
Additional Itanium System Environment Exceptions
Itanium Reg Faults NaT Register Consumption Abort.
#GP(0)
Protected Mode Exceptions
#GP(0)
Real Address Mode Exceptions
#GP
Virtual 8086 Mode Exceptions
#GP(0)
4:336
If PSR.si is 1 or CR4.TSD is 1 and the CPL is greater than 0.
If the TSD flag in register CR4 is set and the CPL is greater than 0.
/*For the IA-32 System Environment only*/
If the TSD flag in register CR4 is set. /*For the IA-32 System
Environment only*/
If the TSD flag in register CR4 is set. /*For the IA-32 System
Environment only*/
Volume 4: Base IA-32 Instruction Reference