Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1555

LAR—Load Access Rights Byte (Continued)
Table 2-15.
Operation
IF SRC(Offset) > descriptor table limit THEN ZF  0; FI;
Read segment descriptor;
IF SegmentDescriptor(Type) conforming code segment
AND (CPL > DPL) OR (RPL > DPL)
OR Segment type is not valid for instruction
THEN
ELSE
FI;
Flags Affected
The ZF flag is set to 1 if the access rights are loaded successfully; otherwise, it is
cleared to 0.
Additional Itanium System Environment Exceptions
Itanium Reg Faults NaT Register Consumption Abort.
Itanium Mem FaultsVHPT Data Fault, Nested TLB Fault, Data TLB Fault, Alternate Data
Volume 4: Base IA-32 Instruction Reference
LAR Descriptor Validity
Type
0 Reserved
1 Available 16-bit TSS
2 LDT
3 Busy 16-bit TSS
4 16-bit call gate
5 16-bit/32-bit task gate
6 16-bit trap gate
7 16-bit interrupt gate
8 Reserved
9 Available 32-bit TSS
A Reserved
B Busy 32-bit TSS
C 32-bit call gate
D Reserved
E 32-bit trap gate
F 32-bit interrupt gate
ZF  0
IF OperandSize = 32
THEN
DEST  [SRC] AND 00FxFF00H;
ELSE (*OperandSize = 16*)
DEST  [SRC] AND FF00H;
FI;
TLB Fault, Data Page Not Present Fault, Data NaT Page Consumption
Abort, Data Key Miss Fault, Data Key Permission Fault, Data Access
Rights Fault, Data Access Bit Fault, Data Dirty Bit Fault
Name Valid
No
Yes
Yes
Yes
Yes
Yes
No
No
No
Yes
No
Yes
Yes
No
No
No
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