Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1368

CMOVcc—Conditional Move (Continued)
Opcode
0F 41 cw/cd
0F 41 cw/cd
0F 4B cw/cd
0F 4B cw/cd
0F 49 cw/cd
0F 49 cw/cd
0F 45 cw/cd
0F 45 cw/cd
0F 40 cw/cd
0F 40 cw/cd
0F 4A cw/cd
0F 4A cw/cd
0F 4A cw/cd
0F 4A cw/cd
0F 4B cw/cd
0F 4B cw/cd
0F 48 cw/cd
0F 48 cw/cd
0F 44 cw/cd
0F 44 cw/cd
Description
The CMOVcc instructions check the state of one or more of the status flags in the
EFLAGS register (CF, OF, PF, SF, and ZF) and perform a move operation if the flags are
in a specified state (or condition). A condition code (cc) is associated with each
instruction to indicate the condition being tested for. If the condition is not satisfied, a
move is not performed and execution continues with the instruction following the
CMOVcc instruction.
If the condition is false for the memory form, some processor implementations will
initiate the load (and discard the loaded data), possible memory faults can be
generated. Other processor models will not initiate the load and not generate any faults
if the condition is false.
These instructions can move a 16- or 32-bit value from memory to a general-purpose
register or from one general-purpose register to another. Conditional moves of 8-bit
register operands are not supported.
The conditions for each CMOVcc mnemonic is given in the description column of the
above table. The terms "less" and "greater" are used for comparisons of signed integers
and the terms "above" and "below" are used for unsigned integers.
Because a particular state of the status flags can sometimes be interpreted in two
ways, two mnemonics are defined for some opcodes. For example, the CMOVA
(conditional move if above) instruction and the CMOVNBE (conditional move if not
below or equal) instruction are alternate mnemonics for the opcode 0F 47H.
4:66
Instruction
CMOVNO r16, r/m16
CMOVNO r32, r/m32
CMOVNP r16, r/m16
CMOVNP r32, r/m32
CMOVNS r16, r/m16
CMOVNS r32, r/m32
CMOVNZ r16, r/m16
CMOVNZ r32, r/m32
CMOVO r16, r/m16
CMOVO r32, r/m32
CMOVP r16, r/m16
CMOVP r32, r/m32
CMOVPE r16, r/m16
CMOVPE r32, r/m32
CMOVPO r16, r/m16
CMOVPO r32, r/m32
CMOVS r16, r/m16
CMOVS r32, r/m32
CMOVZ r16, r/m16
CMOVZ r32, r/m32
Description
Move if not overflow (OF=0)
Move if not overflow (OF=0)
Move if not parity (PF=0)
Move if not parity (PF=0)
Move if not sign (SF=0)
Move if not sign (SF=0)
Move if not zero (ZF=0)
Move if not zero (ZF=0)
Move if overflow (OF=0)
Move if overflow (OF=0)
Move if parity (PF=1)
Move if parity (PF=1)
Move if parity even (PF=1)
Move if parity even (PF=1)
Move if parity odd (PF=0)
Move if parity odd (PF=0)
Move if sign (SF=1)
Move if sign (SF=1)
Move if zero (ZF=1)
Move if zero (ZF=1)
Volume 4: Base IA-32 Instruction Reference