Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1838

MOVSS: Move Scalar Single-FP
Opcode
F3,0F,10,/r
F3,0F,11,/r
Operation: if (destination == xmm1) {
if (source == m32) {
// load instruction
xmm1[31-0]
xmm1[63-32]
xmm1[95-64]
xmm1[127-96] = 0x00000000;
}
else {
// move instruction
xmm1[31-0]
xmm1[63-32]
xmm1[95-64]
xmm1[127-96] = xmm1[127-96];
}
}
else {
if (destination == m32) {
// store instruction
m32 = xmm1[31-0];
}
else {
// move instruction
xmm2[31-0]
xmm2[63-32]
xmm2[95-64]
4:536
Instruction
MOVSS xmm1, xmm2/m32
MOVSS xmm2/m32, xmm1
= m32;
= 0x00000000;
= 0x00000000;
= xmm2[31-0];
= xmm1[63-32];
= xmm1[95-64];
= xmm1[31-0]
= xmm2[63-32];
= xmm2[95-64];
Description
Move 32 bits representing one scalar SP operand from
XMM2/Mem to XMM1 register.
Move 32 bits representing one scalar SP operand from XMM1
register to XMM2/Mem.
Volume 4: IA-32 SSE Instruction Reference