Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1163
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tf
Operation:
if (PR[qp]) {
if (p
illegal_operation_fault();
tmp_rel = (psr.vm && pal_vp_env_enabled() && VAC.a_tf) ?
if (trel == 'z')
tmp_rel = !tmp_rel;
switch (ctype) {
case 'and':
case 'or':
case 'or.andcm':
case 'unc':
default:
}
} else {
if (ctype == 'unc') {
if (p
PR[p
PR[p
}
}
Illegal Operation fault
Interruptions:
3:264
== p
)
1
2
vcpuid[4]{imm5} : cpuid[4]{imm5};
if (!tmp_rel) {
PR[p
] = 0;
1
PR[p
] = 0;
2
}
break;
if (tmp_rel) {
PR[p
] = 1;
1
PR[p
] = 1;
2
}
break;
if (tmp_rel) {
PR[p
] = 1;
1
PR[p
] = 0;
2
}
break;
PR[p
] = tmp_rel;
1
PR[p
] = !tmp_rel;
2
break;
== p
)
1
2
illegal_operation_fault();
] = 0;
1
] = 0;
2
// 'z' - test for 0, not 1
// and-type compare
// or-type compare
// or.andcm-type compare
// unc-type compare
// normal compare
Volume 3: Instruction Reference
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