Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 981

fmin
fmin — Floating-point Minimum
( ) fmin.
Format: qp sf f
The operand with the smaller value is placed in FR
Description:
.
f
3
If either FR
If either FR
This operation does not propagate NaNs the same way as other arithmetic
floating-point instructions. The Invalid Operation is signaled in the same manner as the
fcmp.lt operation.
The mnemonic values for sf are given in
Operation: if (PR[qp]) {
fp_check_target_register(f
if (tmp_isrcode = fp_reg_disabled(f
disabled_fp_register_fault(tmp_isrcode, 0);
if (fp_is_natval(FR[f
FR[f
} else {
fminmax_exception_fault_check(f
if (fp_raise_fault(tmp_fp_env))
tmp_bool_res = fp_less_than(fp_reg_read(FR[f
FR[f
fp_update_fpsr(sf, tmp_fp_env);
}
fp_update_psr(f
}
Invalid Operation (V)
FP Exceptions:
Denormal/Unnormal Operand (D)
Software Assist (SWA) fault
Illegal Operation fault
Interruptions:
Disabled Floating-point Register fault
3:82
= ,
f f
1 2 3
or FR is a NaN, FR
f f f
2 3
or FR is a NaTVal, FR
f f
2 3
);
1
]) || fp_is_natval(FR[f
2
] = NATVAL;
1
fp_exception_fault(fp_decode_fault(tmp_fp_env));
] = tmp_bool_res ? FR[f
1
);
1
. If FR
f
1
gets FR .
f
1 3
is set to NaTVal instead of the computed result.
f
1
Table 2-23 on page
, f , f , 0))
1 2 3
])) {
3
, f , sf, &tmp_fp_env);
2 3
2
fp_reg_read(FR[f
3
] : FR[f ];
2 3
Floating-point Exception fault
equals FR , FR gets FR
f f f
2 3 1
3:56.
]),
]));
Volume 3: Instruction Reference
F8