Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1142
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Operation:
if (PR[qp]) {
fp_check_target_register(f
if (tmp_isrcode = fp_reg_disabled(f
disabled_fp_register_fault(tmp_isrcode, 0);
if (!GR[r
if (single_form)
else if (double_form)
else if (significand_form) {
} else {
}
} else
FR[f
fp_update_psr(f
}
Illegal Operation fault
Interruptions:
Volume 3: Instruction Reference
);
1
].nat) {
2
FR[f
] = fp_mem_to_fr_format(GR[r
1
FR[f
] = fp_mem_to_fr_format(GR[r
1
FR[f
].significand = GR[r
1
FR[f
].exponent = FP_INTEGER_EXP;
1
FR[f
].sign = 0;
1
FR[f1].significand = 0x8000000000000000;
FR[f1].exp = GR[r2]{16:0};
FR[f1].sign = GR[r2]{17};
] = NATVAL;
1
);
1
, 0, 0, 0))
1
], 4, 0);
2
], 8, 0);
2
];
2
// exponent_form
Disabled Floating-point Register fault
setf
3:243
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