Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1344

BTC—Bit Test and Complement
Opcode
0F BB
0F BB
0F BA /7 ib
0F BA /7 ib
Description
Selects the bit in a bit string (specified with the first operand, called the bit base) at the
bit-position designated by the bit offset operand (second operand), stores the value of
the bit in the CF flag, and complements the selected bit in the bit string. The bit base
operand can be a register or a memory location; the bit offset operand can be a register
or an immediate value. If the bit base operand specifies a register, the instruction takes
the modulo 16 or 32 (depending on the register size) of the bit offset operand, allowing
any bit position to be selected in a 16- or 32-bit register, respectively. If the bit base
operand specifies a memory location, it represents the address of the byte in memory
that contains the bit base (bit 0 of the specified byte) of the bit string. The offset
operand then selects a bit position within the range 2
and 0 to 31 for an immediate offset.
Some assemblers support immediate bit offsets larger than 31 by using the immediate
bit offset field in combination with the displacement field of the memory operand. See
"BT—Bit Test" on page 4:40
Operation
CF  Bit(BitBase, BitOffset)
Bit(BitBase, BitOffset)  NOT Bit(BitBase, BitOffset);
Flags Affected
The CF flag contains the value of the selected bit before it is complemented. The OF, SF,
ZF, AF, and PF flags are undefined.
Additional Itanium System Environment Exceptions
Itanium Reg Faults NaT Register Consumption Abort.
Itanium Mem FaultsVHPT Data Fault, Nested TLB Fault, Data TLB Fault, Alternate Data
4:42
Instruction
BTC r/m16,r16
BTC r/m32,r32
BTC r/m16,imm8
BTC r/m32,imm8
for more information on this addressing mechanism.
TLB Fault, Data Page Not Present Fault, Data NaT Page Consumption
Abort, Data Key Miss Fault, Data Key Permission Fault, Data Access
Rights Fault, Data Access Bit Fault, Data Dirty Bit Fault
Description
Store selected bit in CF flag and complement
Store selected bit in CF flag and complement
Store selected bit in CF flag and complement
Store selected bit in CF flag and complement
31
to 2
Volume 4: Base IA-32 Instruction Reference
31
 1 for a register offset