Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1181

Table 3-1. Pseudo-code Functions (Continued)
Function
check_branch_implemented(check_type) Implementation-dependent routine which returns TRUE or FALSE, depending on
check_probe_virtualization_fault(type,
cpl)
check_target_register(r1)
check_target_register_sof(r1, newsof)
concatenate2(x1, x2)
concatenate4(x1, x2, x3, x4)
concatenate8(x1, x2, x3, x4, x5, x6, x7,
x8)
data_serialize()
deliver_unmasked_pending_interrupt()
execute_hint(hint)
fadd(fp_dp, fr2)
fcmp_exception_fault_check(f2, f3, frel,
sf, *tmp_fp_env)
fcvt_fx_exception_fault_check(fr2,
signed_form, trunc_form, sf *tmp_fp_env)
fma_exception_fault_check(f2, f3, f4, pc,
sf, *tmp_fp_env)
fminmax_exception_fault_check(f2, f3, sf,
*tmp_fp_env)
fms_fnma_exception_fault_check(f2, f3,
f4, pc, sf, *tmp_fp_env)
fmul(fr3, fr4)
followed_by_stop()
fp_check_target_register(f1)
fp_decode_fault(tmp_fp_env)
fp_decode_traps(tmp_fp_env)
fp_equal(fr1, fr2)
fp_fr_to_mem_format(freg, size)
fp_ieee_recip(num, den)
fp_ieee_recip_sqrt(root)
fp_is_nan(freg)
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Intel Itanium Architecture Software Developer's Manual Rev. 2.3
whether a failing check instruction causes a branch (TRUE), or a Speculative
Operation fault (FALSE). The result may be different for different types of check
instructions: CHKS_GENERAL, CHKS_FLOAT, CHKA_GENERAL, CHKA_FLOAT. In
addition, the result may depend on other implementation-dependent parameters.
If implemented, this function may raise virtualization faults for specific probe
instructions. Please refer to the instruction page for probe instruction for details.
If the r1 argument specifies an out-of-frame stacked register (as defined by CFM) or
r1 specifies GR0, an Illegal Operation fault is delivered, and this function does not
return.
If the r1 argument specifies an out-of-frame stacked register (as defined by the
newsof argument) or r1 specifies GR0, an Illegal Operation fault is delivered and
this function does not return.
Concatenates the lower 32 bits of the 2 arguments, and returns the 64-bit result.
Concatenates the lower 16 bits of the 4 arguments, and returns the 64-bit result.
Concatenates the lower 8 bits of the 8 arguments, and returns the 64-bit result.
Ensures all prior register updates with side-effects are observed before subsequent
execution and data memory references are performed.
This implementation-specific function checks whether any unmasked external
interrupts are pending, and if so, transfers control to the external interrupt vector.
Executes the hint specified by hint .
Adds a floating-point register value to the infinitely precise product and return the
infinitely precise sum, ready for rounding.
Checks for all floating-point faulting conditions for the fcmp instruction.
Checks for all floating-point faulting conditions for the fcvt.fx , fcvt.fxu ,
fcvt.fx.trunc and fcvt.fxu.trunc instructions. It propagates NaNs.
Checks for all floating-point faulting conditions for the fma instruction. It propagates
NaNs and special IEEE results.
Checks for all floating-point faulting conditions for the famax , famin , fmax , and fmin
instructions.
Checks for all floating-point faulting conditions for the fms and fnma instructions. It
propagates NaNs and special IEEE results.
Performs an infinitely precise multiply of two floating-point register values.
Returns TRUE if the current instruction is followed by a stop; otherwise, returns
FALSE.
If the specified floating-point register identifier is 0 or 1, this function causes an illegal
operation fault.
Returns floating-point exception fault code values for ISR.code.
Returns floating-point trap code values for ISR.code.
IEEE standard equality relationship test.
Converts a floating-point value in register format to floating-point memory format. It
assumes that the floating-point value in the register has been previously rounded to
the correct precision which corresponds with the size parameter.
Returns the true quotient for special sets of operands, or an approximation to the
reciprocal of the divisor to be used in the software divide algorithm.
Returns the true square root result for special operands, or an approximation to the
reciprocal square root to be used in the software square root algorithm.
Returns true when floating register contains a NaN.
Operation
Volume 3: Pseudo-Code Functions