Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1733

PMULHW—Packed Multiply High
Opcode
0F E5 /r
Description
Multiplies the four signed words of the source operand (second operand) by the four
signed words of the destination operand (first operand), producing four signed,
doubleword, intermediate results (see
intermediate result is then written to its corresponding word location in the destination
operand. The destination operand must be an MMX technology register; the source
operand may be either an MMX technology register or a 64-bit memory location.
Figure 3-13.
mm
mm/m64
mm
Operation
DEST(15..0)  HighOrderWord(DEST(15..0)  SRC(15..0));
DEST(31..16)  HighOrderWord(DEST(31..16)  SRC(31..16));
DEST(47..32)  HighOrderWord(DEST(47..32)  SRC(47..32));
DEST(63..48)  HighOrderWord(DEST(63..48)  SRC(63..48));
Flags Affected
None.
Additional Itanium System Environment Exceptions
Itanium Reg Faults Disabled FP Register Fault if PSR.dfl is 1, NaT Register Consumption
Itanium Mem FaultsVHPT Data Fault, Nested TLB Fault, Data TLB Fault, Alternate Data
®
Volume 4: IA-32 Intel MMX™ Technology Instruction Reference
Instruction
PMULHW mm, mm/m64 Multiply the signed packed words in mm by the signed
Operation of the PMULHW Instruction
PMULHW mm, mm/m64
*
High Order High Order
Abort.
TLB Fault, Data Page Not Present Fault, Data NaT Page Consumption
Abort, Data Key Miss Fault, Data Key Permission Fault, Data Access
Rights Fault, Data Access Bit Fault, Data Dirty Bit Fault
Description
packed words in mm/m64 , then store the high-order word
of each doubleword result in mm .
Figure 3-13). The high-order word of each
0111000111000111
* *
1000000000000000
High Order
1100011100011100
0111000111000111
*
0000010000000000
High Order
0000000111000111
3006022
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