Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1821

MAXPS: Packed Single-FP Maximum
Opcode
0F,5F,/r
Operation: xmm1[31-0]
xmm2/m128[31-0];
xmm1[63-32]
xmm2/m128[63-32];
xmm1[95-64]
xmm2/m128[95-64];
xmm1[127-96]
xmm2/m128[127-96];
The MAXPS instruction returns the maximum SP FP numbers from XMM1 and
Description:
XMM2/Mem. If the values being compared are both zeros, source2 (xmm2/m128)
would be returned. If source2 (xmm2/m128) is an sNaN, this sNaN is forwarded
unchanged to the destination (i.e. a quieted version of the sNaN is not returned).
General protection exception if not aligned on 16-byte boundary, regardless of
FP Exceptions:
segment.
Invalid (including qNaN source operand), Denormal.
Numeric Exceptions:
Protected Mode Exceptions:
#GP(0) for an illegal memory operand effective address in the CS, DS, ES, FS or GS
segments; #SS(0) for an illegal address in the SS segment; #PF(fault-code) for a page
fault; #UD if CR0.EM = 1; #NM if TS bit in CR0 is set; #XM for an unmasked SSE
numeric exception (CR4.OSXMMEXCPT =1); #UD for an unmasked SSE numeric
exception (CR4.OSXMMEXCPT =0); #UD if CRCR4.OSFXSR(bit 9) = 0; #UD if
CPUID.XMM(EDX bit 25) = 0.
Volume 4: IA-32 SSE Instruction Reference
Instruction
MAXPS xmm1, xmm2/m128
= (xmm1[31-0] == NAN) ? xmm2[31-0] :
(xmm2[31-0] == NAN) ? xmm2[31-0] :
(xmm1[31-0] > xmm2/m128[31-0]) ? xmm1[31-0] ?
= (xmm1[63-32] == NAN) ? xmm2[63-32] :
(xmm2[63-32] == NAN) ? xmm2[63-32] :
(xmm1[63-32] > xmm2/m128[63-32]) ? xmm1[63-32] ?
= (xmm1[95-64] == NAN) ? xmm2[95-64] :
(xmm2[95-64] == NAN) ? xmm2[95-64] :
(xmm1[95-64] > xmm2/m128[95-64]) ? xmm1[95-64] ?
= (xmm1[127-96] == NAN) ? xmm2[127-96] :
(xmm2[127-96] == NAN) ? xmm2[127-96] :
(xmm1[127-96] > xmm2/m128[127-96]) ? xmm1[127-96] ?
Description
Return the maximum SP FP numbers between XMM2/Mem
and XMM1.
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