Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1592

MOV—Move to/from Debug Registers
Opcode
0F 21/ r
0F 21/ r
0F 21/ r
0F 23 / r
0F 23 / r
0F 23 / r
Description
Moves the contents of two or more debug registers (DR0 through DR3, DR4 and DR5,
or DR6 and DR7) to a general-purpose register or vice versa. The operand size for these
instructions is always 32 bits, regardless of the operand-size attribute. (See the Intel
Architecture Software Developer's Manual, Volume 3 for a detailed description of the
flags and fields in the debug registers.)
The instructions must be executed at privilege level 0 or in real-address mode.
When the debug extension (DE) flag in register CR4 is clear, these instructions operate
on debug registers in a manner that is compatible with Intel386™ and Intel486
processors. In this mode, references to DR4 and DR5 refer to DR6 and DR7,
respectively. When the DE set in CR4 is set, attempts to reference DR4 and DR5 result
in an undefined opcode (#UD) exception.
At the opcode level, the reg field within the ModR/M byte specifies which of the debug
registers is loaded or read. The two bits in the mod field are always 11. The r/m field
specifies the general-purpose register loaded or read.
Operation
IF Itanium System Environment THEN IA-32_Intercept(INST,MOVDR);
IF ((DE = 1) and (SRC or DEST = DR4 or DR5))
THEN
#UD;
ELSE
DEST  SRC;
Flags Affected
The OF, SF, ZF, AF, PF, and CF flags are undefined.
Additional Itanium System Environment Exceptions
IA-32_Intercept
Protected Mode Exceptions
#GP(0)
#UD
4:290
Instruction
MOV r32, DR0-DR3
MOV r32, DR4-DR5
MOV r32, DR6-DR7
MOV DR0-DR3, r32
MOV DR4-DR5, r32
MOV DR6-DR7, r32
Mandatory Instruction Intercept.
If the current privilege level is not 0.
If the DE (debug extensions) bit of CR4 is set and a MOV instruction
is executed involving DR4 or DR5.
Description
Move debug registers to r32
Move debug registers to r32
Move debug registers to r32
Move r32 to debug registers
Move r32 to debug registers
Move r32 to debug registers
Volume 4: Base IA-32 Instruction Reference