Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1047

Hide thumbs Also See for ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3:
Table of Contents

Advertisement

itc
Operation:
if (PR[qp]) {
if (!followed_by_stop())
undefined_behavior();
if (PSR.ic)
illegal_operation_fault();
if (PSR.cpl != 0)
privileged_operation_fault(0);
if (GR[r
register_nat_consumption_fault(0);
tmp_size = CR[ITIR].ps;
tmp_va = CR[IFA]{60:0};
tmp_rid = RR[CR[IFA]{63:61}].rid;
tmp_va = align_to_size_boundary(tmp_va, tmp_size);
if (is_reserved_field(TLB_TYPE, GR[r
reserved_register_field_fault();
if (!impl_check_mov_ifa() &&
unimplemented_data_address_fault(0);
if (PSR.vm == 1)
virtualization_fault();
if (instruction_form) {
tlb_must_purge_itc_entries(tmp_rid, tmp_va, tmp_size);
tlb_may_purge_dtc_entries(tmp_rid, tmp_va, tmp_size);
slot = tlb_replacement_algorithm(ITC_TYPE);
tlb_insert_inst(slot, GR[r
} else {
tlb_must_purge_dtc_entries(tmp_rid, tmp_va, tmp_size);
tlb_may_purge_itc_entries(tmp_rid, tmp_va, tmp_size);
slot = tlb_replacement_algorithm(DTC_TYPE);
tlb_insert_data(slot, GR[r
}
}
Machine Check abort
Interruptions:
Illegal Operation fault
Privileged Operation fault
Register NaT Consumption fault
For the instruction_form, software must issue an instruction serialization operation
Serialization:
before a dependent instruction fetch access. For the data_form, software must issue a
data serialization operation before issuing a data access or non-access reference
dependent on the new translation.
3:148
].nat)
2
unimplemented_virtual_address(CR[IFA], PSR.vm))
], CR[ITIR]))
2
], CR[ITIR], CR[IFA], tmp_rid, TC);
2
// data_form
], CR[ITIR], CR[IFA], tmp_rid, TC);
2
Reserved Register/Field fault
Unimplemented Data Address fault
Virtualization fault
Volume 3: Instruction Reference

Advertisement

Table of Contents
loading

This manual is also suitable for:

Itanium architecture 2.3

Table of Contents