Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1875

PSADBW: Packed Sum of Absolute Differences
Opcode
0F,F6, /r
Operation: temp1
temp2
temp3
temp4
temp5
temp6
temp7
temp8
mm1[15:0] = temp1 + temp2 + temp3 + temp4 + temp5 + temp6 + temp7 + temp8;
mm1[31:16] = 0x00000000;
mm1[47:32] = 0x00000000;
mm1[63:48] = 0x00000000;
The PSADBW instruction computes the absolute value of the difference of unsigned
Description:
bytes for mm1 and mm2/m64. These differences are then summed to produce a word
result in the lower 16-bit field; the upper 3 words are cleared.
The destination operand is a MMX technology register. The source operand can either
be a MMX technology register or a 64-bit memory operand.
None
Numeric Exceptions:
Protected Mode Exceptions
#GP(0) for an illegal memory operand effective address in the CS, DS, ES, FS or GS
segments; #SS(0) for an illegal address in the SS segment; #PF (fault-code) for a page
fault; #UD if CR0.EM = 1; #NM if TS bit in CR0 is set; #MF if there is a pending FPU
exception; #AC for unaligned memory reference. To enable #AC exceptions, three
conditions must be true(CR0.AM is set; EFLAGS.AC is set; current CPL is 3).
Real Address Mode Exceptions
Interrupt 13 if any part of the operand would lie outside of the effective address space
from 0 to 0FFFFH; #UD if CR0.EM = 1; #NM if TS bit in CR0 is set; #MF if there is a
pending FPU exception.
Volume 4: IA-32 SSE Instruction Reference
Instruction
PSADBW mm1,mm2/m64
= ABS(mm1[7-0] - mm2/m64[7-0]);
= ABS(mm1[15-8] - mm2/m64[15-8]);
= ABS(mm1[23-16] - mm2/m64[23-16]);
= ABS(mm1[31-24] - mm2/m64[31-24]);
= ABS(mm1[39-32] - mm2/m64[39-32]);
= ABS(mm1[47-40] - mm2/m64[47-40]);
= ABS(mm1[55-48] - mm2/m64[55-48]);
= ABS(mm1[63-56] - mm2/m64[63-56]);
Description
Absolute difference of packed unsigned bytes from MM2
/Mem and MM1; these differences are then summed to
produce a word result.
4:573