Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1380

CPUID—CPU Identification
Opcode
0F A2
Description
Returns processor identification and feature information in the EAX, EBX, ECX, and EDX
registers. The information returned is selected by entering a value in the EAX register
before the instruction is executed.
depending on the initial value loaded into the EAX register.
The ID flag (bit 21) in the EFLAGS register indicates support for the CPUID instruction.
If a software procedure can set and clear this flag, the processor executing the
procedure supports the CPUID instruction.
The information returned with the CPUID instruction is divided into two groups: basic
information and extended function information. Basic information is returned by
entering an input value starting at 0 in the EAX register; extended function information
is returned by entering an input value starting at 80000000H. When the input value in
the EAX register is 0, the processor returns the highest value the CPUID instruction
recognizes in the EAX register for returning basic information. Always use an EAX
parameter value that is equal to or greater than zero and less than or equal to this
highest EAX return value for basic information. When the input value in the EAX
register is 80000000H, the processor returns the highest value the CPUID instruction
recognizes in the EAX register for returning extended function information. Always use
an EAX parameter value that is equal to or greater than zero and less than or equal to
this highest EAX return value for extended function information.
The CPUID instruction can be executed at any privilege level to serialize instruction
execution. Serializing instruction execution guarantees that any modifications to flags,
registers, and memory for previous instructions are completed before the next
instruction is fetched and executed.
Table 2-4.
Initial EAX Value
0
1H
2H
4:78
Instruction Description
CPUID Returns processor identification and feature information in the
EAX, EBX, ECX, and EDX registers, according to the input
value entered initially in the EAX register.
Table 2-4
Information Returned by CPUID Instruction
Information Provided about the Processor
EAX Maximum CPUID Input Value
EBX 756E6547H "Genu" (G in BL)
ECX 6C65746EH "ntel" (n in CL)
EDX 49656E69H "ineI" (i in DL)
EAX Version Information (Type, Family, Model, and Stepping ID)
EBX Bits 7-0: Brand Index
Bits 15-8: CLFLUSH line size (Value * 8 = cache line size in bytes)
Bits 23-16: Number of logical processors per physical processor
Bits 31-24: Local APIC ID
ECX Reserved
EDX Feature Information (see
EAX Cache and TLB Information
EBX Cache and TLB Information
ECX Cache and TLB Information
EDX Cache and TLB Information
shows the information returned,
Basic CPUID Information
a
b
Table 2-5)
Volume 4: Base IA-32 Instruction Reference