Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1121
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pshl
pshl — Parallel Shift Left
(
) pshl2
Format:
qp
(
) pshl2
qp
(
) pshl4
qp
(
) pshl4
qp
The data elements of GR
Description:
count in GR
filled with zeros. The shift count is interpreted as unsigned. Shift counts greater than 15
(for 16-bit quantities) or 31 (for 32-bit quantities) yield all zero results. The results are
placed in GR
Figure 2-39.
GR r
:
2
GR r
:
1
Operation:
if (PR[qp]) {
check_target_register(r
shift_count = (variable_form ? GR[r
tmp_nat = (variable_form ? GR[r
if (two_byte_form) {
if (shift_count u> 16)
GR[r
GR[r
GR[r
GR[r
} else {
if (shift_count u> 32)
GR[r
GR[r
}
GR[r
].nat = GR[r
1
}
Illegal Operation fault
Interruptions:
3:222
=
,
r
r
r
1
2
3
=
, count
r
r
1
2
5
=
,
r
r
r
1
2
3
=
, count
r
r
1
2
5
are each independently shifted to the left by the scalar shift
r
2
, or in the immediate field count
r
3
.
r
1
Parallel Shift Left Examples
0
0
0
0
0
0
pshl2
);
1
shift_count = 16;
]{15:0}
= GR[r
]{15:0}
1
2
]{31:16} = GR[r
]{31:16} << shift_count;
1
2
]{47:32} = GR[r
]{47:32} << shift_count;
1
2
]{63:48} = GR[r
]{63:48} << shift_count;
1
2
shift_count = 32;
]{31:0}
= GR[r
]{31:0}
1
2
]{63:32} = GR[r
]{63:32} << shift_count;
1
2
].nat || tmp_nat;
2
two_byte_form, variable_form
two_byte_form, fixed_form
four_byte_form, variable_form
four_byte_form, fixed_form
. The low-order bits of each element are
5
GR r
:
2
Shift Left
0
0
GR r
:
1
] : count
);
3
5
].nat : 0);
3
// two_byte_form
<< shift_count;
// four_byte_form
<< shift_count;
Volume 3: Instruction Reference
I7
I8
I7
I8
0
0
0
0
pshl4
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