Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1874
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PMULHUW: Packed Multiply High Unsigned
Opcode
0F,E4,/r
Operation:
mm1[15-0]
mm1[31-16]
mm1[47-32]
mm1[63-48]
The PMULHUW instruction multiplies the four unsigned words in the destination operand
Description:
with the four unsigned words in the source operand. The high-order 16 bits of the
32-bit intermediate results are written to the destination operand.
None.
Numeric Exceptions:
Protected Mode Exceptions
#GP(0) for an illegal memory operand effective address in the CS, DS, ES, FS or GS
segments; #SS(0) for an illegal address in the SS segment; #PF (fault-code) for a page
fault; #UD if CR0.EM = 1; #NM if TS bit in CR0 is set; #MF if there is a pending FPU
exception; #AC for unaligned memory reference. To enable #AC exceptions, three
conditions must be true(CR0.AM is set; EFLAGS.AC is set; current CPL is 3).
Real Address Mode Exceptions
Interrupt 13 if any part of the operand would lie outside of the effective address space
from 0 to 0FFFFH; #UD if CR0.EM = 1; #NM if TS bit in CR0 is set; #MF if there is a
pending FPU exception.
Virtual 8086 Mode Exceptions
Same exceptions as in Real Address Mode; #PF(fault-code) for a page fault; #AC for
unaligned memory reference if the current privilege level is 3.
Additional Itanium System Environment Exceptions
Itanium Reg Faults
Itanium Mem Faults VHPT Data Fault, Data TLB Fault, Alternate Data TLB Fault, Data
4:572
Instruction
PMULHUW mm1, mm2/m64
= (mm1[15-0]
* mm2/m64[15-0])[31-16];
= (mm1[31-16]
* mm2/m64[31-16])[31-16];
= (mm1[47-32]
* mm2/m64[47-32])[31-16];
= (mm1[63-48]
* mm2/m64[63-48])[31-16];
Disabled FP Register Fault if PSR.dfl is 1, NaT Register
Consumption Fault
Page Not Present Fault, Data NaT Page Consumption Abort, Data
Key Miss Fault, Data Key Permission Fault, Data Access Rights
Fault, Data Access Bit Fault
Description
Multiply the packed unsigned words in MM1 register
with the packed unsigned words in MM2/Mem, then
store the high-order 16 bits of the results in MM1.
Volume 4: IA-32 SSE Instruction Reference
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