Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1554

LAR—Load Access Rights Byte
Opcode
0F 02 / r
0F 02 / r
Description
Loads the access rights from the segment descriptor specified by the second operand
(source operand) into the first operand (destination operand) and sets the ZF flag in the
EFLAGS register. The source operand (which can be a register or a memory location)
contains the segment selector for the segment descriptor being accessed. The
destination operand is a general-purpose register.
The processor performs access checks as part of the loading process. Once loaded in
the destination register, software can preform additional checks on the access rights
information.
When the operand size is 32 bits, the access rights for a segment descriptor comprise
the type and DPL fields and the S, P, AVL, D/B, and G flags, all of which are located in
the second doubleword (bytes 4 through 7) of the segment descriptor. The doubleword
is masked by 00FXFF00H before it is loaded into the destination operand. When the
operand size is 16 bits, the access rights comprise the type and DPL fields. Here, the
two lower-order bytes of the doubleword are masked by FF00H before being loaded into
the destination operand.
This instruction performs the following checks before it loads the access rights in the
destination register:
• Checks that the segment selector is not null.
• Checks that the segment selector points to a descriptor that is within the limits of
the GDT or LDT being accessed.
• Checks that the descriptor type is valid for this instruction. All code and data
segment descriptors are valid for (can be accessed with) the LAR instruction. The
valid system segment and gate descriptor types are given in the following table.
• If the segment is not a conforming code segment, it checks that the specified
segment descriptor is visible at the CPL (that is, if the CPL and the RPL of the
segment selector are less than or equal to the DPL of the segment selector).
If the segment descriptor cannot be accessed or is an invalid type for the instruction,
the ZF flag is cleared and no access rights are loaded in the destination operand.
The LAR instruction can only be executed in protected mode.
4:252
Instruction Description
r16  r/m16 masked by FF00H
LAR r16,r/m16
r32  r/m32 masked by 00FxFF00H
LAR r32,r/m32
Volume 4: Base IA-32 Instruction Reference