Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1550

Hide thumbs Also See for ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3:
Table of Contents

Advertisement

JMP—Jump (Continued)
#GP(selector)
#SS(0)
#NP (selector)
#PF(fault-code)
#AC(0)
Real Address Mode Exceptions
#GP
#SS
Virtual 8086 Mode Exceptions
#GP(0)
#SS(0)
#PF(fault-code)
#AC(0)
4:248
If the DS, ES, FS, or GS register is used to access memory and it
contains a null segment selector.
If segment selector index is outside descriptor table limits.
If the segment descriptor pointed to by the segment selector in the
destination operand is not for a conforming-code segment,
nonconforming-code segment, call gate, task gate, or task state
segment.
If the DPL for a nonconforming-code segment is not equal to the CPL
(When not using a call gate.) If the RPL for the segment's segment
selector is greater than the CPL.
If the DPL for a conforming-code segment is greater than the CPL.
If the DPL from a call-gate, task-gate, or TSS segment descriptor is
less than the CPL or than the RPL of the call-gate, task-gate, or TSS's
segment selector.
If the segment descriptor for selector in a call gate does not indicate
it is a code segment.
If the segment descriptor for the segment selector in a task gate
does not indicate available TSS.
If the segment selector for a TSS has its local/global bit set for local.
If a TSS segment descriptor specifies that the TSS is busy or not
available.
If a memory operand effective address is outside the SS segment
limit.
If the code segment being accessed is not present.
If call gate, task gate, or TSS not present.
If a page fault occurs.
If alignment checking is enabled and an unaligned memory
reference is made while the current privilege level is 3. (Only occurs
when fetching target from memory.)
If a memory operand effective address is outside the CS, DS, ES, FS,
or GS segment limit.
If a memory operand effective address is outside the CS, DS, ES, FS,
or GS segment limit.
If a memory operand effective address is outside the SS segment
limit.
If the target operand is beyond the code segment limits.
If a memory operand effective address is outside the CS, DS, ES, FS,
or GS segment limit.
If a memory operand effective address is outside the SS segment
limit.
If a page fault occurs.
If alignment checking is enabled and an unaligned memory
reference is made. (Only occurs when fetching target from memory.)
Volume 4: Base IA-32 Instruction Reference

Advertisement

Table of Contents
loading

This manual is also suitable for:

Itanium architecture 2.3

Table of Contents