Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1378

CMPXCHG8B—Compare and Exchange 8 Bytes
Opcode
0F C7 /1 m64
Description
Compares the 64-bit value in EDX:EAX with the operand (destination operand). If the
values are equal, the 64-bit value in ECX:EBX is stored in the destination operand.
Otherwise, the value in the destination operand is loaded into EDX:EAX. The destination
operand is an 8-byte memory location. For the EDX:EAX and ECX:EBX register pairs,
EDX and ECX contain the high-order 32 bits and EAX and EBX contain the low-order 32
bits of a 64-bit value.
This instruction can be used with a LOCK prefix to allow the instruction to be executed
atomically. To simplify the interface to the processor's bus, the destination operand
receives a write cycle without regard to the result of the comparison. The destination
operand is written back if the comparison fails; otherwise, the source operand is written
into the destination. (The processor never produces a locked read without also
producing a locked write.)
Operation
IF Itanium System Environment AND External_Atomic_Lock_Required AND DCR.lc
THEN IA-32_Intercept(LOCK,CMPXCHG);
IF (EDX:EAX = DEST)
ZF  1
DEST  ECX:EBX
ELSE
ZF  0
EDX:EAX  DEST
FI;
Flags Affected
The ZF flag is set if the destination operand and EDX:EAX are equal; otherwise it is
cleared. The CF, PF, AF, SF, and OF flags are unaffected.
Additional Itanium System Environment Exceptions
Itanium Reg Faults NaT Register Consumption Abort.
Itanium Mem FaultsVHPT Data Fault, Nested TLB Fault, Data TLB Fault, Alternate Data
IA-32_Intercept
4:76
Instruction
CMPXCHG8B m64
TLB Fault, Data Page Not Present Fault, Data NaT Page Consumption
Abort, Data Key Miss Fault, Data Key Permission Fault, Data Access
Rights Fault, Data Access Bit Fault, Data Dirty Bit Fault
Lock Intercept If an external atomic bus lock is required to
–
complete this operation and DCR.lc is 1, no atomic transaction
occurs, this instruction is faulted and an IA-32_Intercept(Lock) fault
is generated. The software lock handler is responsible for the
emulation of this instruction
Description
Compare EDX:EAX with m64 . If equal, set ZF and load
ECX:EBX into m64 . Else, clear ZF and load m64 into
EDX:EAX.
Volume 4: Base IA-32 Instruction Reference