Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1168

ttag — Translation Hashed Entry Tag
( ) ttag
Format: qp r
1
A tag used for matching during searches of the long format Virtual Hashed Page Table
Description:
(VHPT) is generated and placed in GR
the region register selected by GR
If ttag is given a NaT input argument or an unimplemented virtual address as an input,
the resulting target register value is undefined, and its NaT bit is set to one.
The tag generation function generates an implementation-specific long format VHPT
tag. The tag generation function must use all implemented region bits and only virtual
address bits {60:0}. PTA.vf is ignored by this instruction.
A translation in the long format VHPT must be uniquely identified by its hash index
generated by the thash instruction and the tag produced from this instruction.
This instruction must be implemented on all processor models, even processor models
that do not implement a VHPT walker.
This instruction can only be executed when PSR.vm is 0.
Operation: if (PR[qp]) {
check_target_register(r
if (PSR.vm == 1)
virtualization_fault();
if (GR[r
GR[r
GR[r
} else {
tmp_vr = GR[r
tmp_va = GR[r
GR[r
GR[r
}
}
Illegal Operation fault
Interruptions:
Volume 3: Instruction Reference
=
r
3
);
1
].nat || unimplemented_virtual_address(GR[r
3
] = undefined();
1
].nat = 1;
1
]{63:61};
3
]{60:0};
3
] = tlb_vhpt_tag(tmp_va, RR[tmp_vr].rid, RR[tmp_vr].ps);
1
].nat = 0;
1
. The virtual address is specified by GR
r
1
bits {63:61}.
r
3
Virtualization fault
ttag
M46
and
r
3
], PSR.vm)) {
3
3:269