Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1742

PSRAW/PSRAD—Packed Shift Right Arithmetic
Opcode
0F E1 /r
0F 71 /4 ib
0F E2 /r
0F 72 /4 ib
Description
Shifts the bits in the data elements (words or doublewords) in the destination operand
(first operand) to the right by the amount of bits specified in the unsigned count
operand (second operand). (See
written to the destination operand. The empty high-order bits of each element are filled
with the initial value of the sign bit of the data element. If the value specified by the
count operand is greater than 15 (for words) or 31 (for doublewords), each destination
data element is filled with the initial value of the sign bit of the element.
The destination operand must be an MMX technology register; the count operand
(source operand) can be either an MMX technology register, a 64-bit memory location,
or an 8-bit immediate.
The PSRAW instruction shifts each of the four words in the destination operand to the
right by the number of bits specified in the count operand; the PSRAD instruction shifts
each of the two doublewords in the destination operand. As the individual data
elements are shifted right, the empty high-order bit positions are filled with the sign
value.
Figure 3-17.
mm
mm
4:440
Instruction
PSRAW mm, mm/m64
PSRAW mm, imm8
PSRAD mm, mm/m64
PSRAD mm, imm8
Figure
Operation of the PSRAW Instruction
PSRAW mm, 2
shift right
Description
Shift words in mm right by amount specified in mm/m64 while
shifting in sign bits.
Shift words in mm right by imm8 while shifting in sign bits
Shift doublewords in mm right by amount specified in mm/m64
while shifting in sign bits.
Shift doublewords in mm right by imm8 while shifting in sign
bits.
3-17.) The result of the shift operation is
1111111111111100
shift right shift right
1111111111111111
®
Volume 4: IA-32 Intel MMX™ Technology Instruction Reference
1101000111000111
shift right
1111010001110001
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