Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1601

NEG—Two's Complement Negation
Opcode
F6 /3
F7 /3
F7 /3
Description
Replaces the value of operand (the destination operand) with its two's complement. The
destination operand is located in a general-purpose register or a memory location.
Operation
IF DEST = 0
THEN CF  0
ELSE CF  1;
FI;
DEST  - (DEST)
Flags Affected
The CF flag cleared to 0 if the source operand is 0; otherwise it is set to 1. The OF, SF,
ZF, AF, and PF flags are set according to the result.
Additional Itanium System Environment Exceptions
Itanium Reg Faults NaT Register Consumption Abort.
Itanium Mem FaultsVHPT Data Fault, Nested TLB Fault, Data TLB Fault, Alternate Data
Protected Mode Exceptions
#GP(0)
#SS(0)
#PF(fault-code)
#AC(0)
Real Address Mode Exceptions
#GP
#SS
Volume 4: Base IA-32 Instruction Reference
Instruction Description
NEG r/m8 Two's complement negate r/m8
NEG r/m16 Two's complement negate r/m16
NEG r/m32 Two's complement negate r/m32
TLB Fault, Data Page Not Present Fault, Data NaT Page Consumption
Abort, Data Key Miss Fault, Data Key Permission Fault, Data Access
Rights Fault, Data Access Bit Fault, Data Dirty Bit Fault
If the destination is located in a nonwritable segment.
If a memory operand effective address is outside the CS, DS, ES, FS,
or GS segment limit.
If the DS, ES, FS, or GS register contains a null segment selector.
If a memory operand effective address is outside the SS segment
limit.
If a page fault occurs.
If alignment checking is enabled and an unaligned memory
reference is made while the current privilege level is 3.
If a memory operand effective address is outside the CS, DS, ES, FS,
or GS segment limit.
If a memory operand effective address is outside the SS segment
limit.
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