Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1201
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4.2.1.3
Integer ALU – Immediate
40
A3
Instruction
sub
and
andcm
or
xor
4.2.1.4
Add Immediate
40
A4
Instruction
adds
addp4
4.2.1.5
Add Immediate
40
A5
addl
4.2.2
Integer Compare
The integer compare instructions are encoded within major opcodes C - E using a 2-bit
opcode extension field (x
33 (t
), 36 (t
a
instructions are encoded within major opcodes C - E using a 2-bit opcode extension
field (x
) in bits 35:34 and two 1-bit opcode extension fields in bits 33 (t
2
as shown in
3:302
8
37 36 35 34 33 32
29 28 27 26
8
s x
v
x
x
2a
e
4
2b
4
1
2
1
4
2
Operands
r
= imm
, r
1
8
3
14
37 36 35 34 33 32
27 26
8
s x
v
imm
2a
e
6d
4
1
2
1
6
Operands
r
= imm
, r
1
14
3
22
37 36 35
27 26
9
s
imm
9d
4
1
9
Instruction
r
= imm
1
) in bits 35:34 and three 1-bit opcode extension fields in bits
2
), and 12 (c), as shown in
b
Table
4-11.
-Register
20 19
r
imm
3
7b
7
7
Opcode
x
2a
8
0
20 19
r
imm
3
7b
7
7
Opcode
8
22 21 20 19
imm
r
imm
5c
3
7b
5
2
7
Operands
, r
22
3
Table
4-10. The integer compare immediate
13 12
6 5
r
qp
1
7
6
Extension
v
x
x
e
4
2b
9
1
0
0
1
B
2
3
13 12
6 5
r
qp
1
7
6
Extension
x
v
2a
e
2
0
3
13 12
6 5
r
qp
1
7
6
Opcode
9
) and 12 (c),
a
Volume 3: Instruction Formats
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