Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1527

INTn/INTO/INT3—Call to Interrupt Procedure (Continued)
(* PE=1, DPL = CPL or conforming segment *)
IF 32-bit gate
THEN
ELSE (* 16-bit gate *)
IF instruction pointer not within code segment limit THEN #GP(0); FI;
IF 32-bit gate
THEN
ELSE (* 16-bit gate *)
FI;
CS(RPL)  CPL;
IF interrupt gate
THEN
FI;
END;
Flags Affected
The EFLAGS register is pushed onto stack. The IF, TF, NT, AC, RF, and VM flags may be
cleared, depending on the mode of operation of the processor when the INT instruction
is executed (see "Operation" section.)
Additional Itanium System Environment Exceptions
IA_32_Exception
IA-32_Interrupt
Volume 4: Base IA-32 Instruction Reference
IF current stack does not have room for 16 bytes (error code pushed)
OR 12 bytes (no error code pushed); THEN #SS(0);
FI;
IF current stack does not have room for 8 bytes (error code pushed)
OR 6 bytes (no error code pushed); THEN #SS(0);
FI;
Push (EFLAGS);
Push (far pointer to return instruction); (* 3 words padded to 4 *)
CS:EIP  Gate(CS:EIP); (* segment descriptor information also loaded *)
Push (ErrorCode); (* if any *)
Push (FLAGS);
Push (far pointer to return location); (* 2 words *)
CS:IP  Gate(CS:IP); (* segment descriptor information also loaded *)
Push (ErrorCode); (* if any *)
IF  0; FI;
TF  0;
NT  0;
VM  0;
RF  0;
If INT3 or INTO form, vector numbers are 3 and 4 respectively.
If INT n form, vector number is N.
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