FDIV/FDIVP/FIDIV—Divide (Continued)
SRC
Notes:
Fmeans finite-real number.
Imeans integer.
*indicates floating-point invalid-arithmetic-operand (#IA) exception.
**indicates floating-point zero-divide (#Z) exception.
Operation
IF SRC 0
THEN
#Z
ELSE
IF instruction is FIDIV
FI;
FI;
IF instruction = FDIVP
THEN
PopRegisterStack
FI;
FPU Flags Affected
C1
C0, C2, C3
4:122
F
-•
-
*
+0
F
+
+F
I
+
+F
0
+
**
+0
-•
**
F
+I
-•
F
+F
-•
+
0
*
NaN
NaN
NaN
THEN
DEST DEST ConvertExtendedReal(SRC);
ELSE (* source operand is real number *)
DEST DEST SRC;
Set to 0 if stack underflow occurred.
Indicates rounding direction if the inexact-result exception (#P) is
generated: 0 = not roundup; 1 = roundup.
Undefined.
DEST
0
+0
+F
0
0
+0
0
F
+0
0
F
+0
*
*
**
*
*
**
0
+0
+F
0
+0
+F
0
+0
+0
NaN
NaN
NaN
Volume 4: Base IA-32 Instruction Reference
+
NaN
*
NaN
-•
NaN
-•
NaN
-•
NaN
+
NaN
+
NaN
+
NaN
*
NaN
NaN
NaN