Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1589

MOV—Move (Continued)
#SS(0)
#SS(selector)
#NP
#PF(fault-code)
#AC(0)
#UD
Real Address Mode Exceptions
#GP
#SS
#UD
Virtual 8086 Mode Exceptions
#GP(0)
#SS(0)
#PF(fault-code)
#AC(0)
#UD
Volume 4: Base IA-32 Instruction Reference
If the DS, ES, FS, or GS register is being loaded and the segment
pointed to is a data or nonconforming code segment, but both the
RPL and the CPL are greater than the DPL.
If a memory operand effective address is outside the SS segment
limit.
If the SS register is being loaded and the segment pointed to is
marked not present.
If the DS, ES, FS, or GS register is being loaded and the segment
pointed to is marked not present.
If a page fault occurs.
If alignment checking is enabled and an unaligned memory
reference is made while the current privilege level is 3.
If attempt is made to load the CS register.
If a memory operand effective address is outside the CS, DS, ES, FS,
or GS segment limit.
If a memory operand effective address is outside the SS segment
limit.
If attempt is made to load the CS register.
If a memory operand effective address is outside the CS, DS, ES, FS,
or GS segment limit.
If a memory operand effective address is outside the SS segment
limit.
If a page fault occurs.
If alignment checking is enabled and an unaligned memory
reference is made.
If attempt is made to load the CS register.
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