Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1521

INTn/INTO/INT3—Call to Interrupt Procedure (Continued)
/*IN the Itanium System Environment all of the following operations are intercepted*/
IF PE=0
THEN
GOTO REAL-ADDRESS-MODE;
ELSE (* PE=1 *)
GOTO PROTECTED-MODE;
FI;
REAL-ADDRESS-MODE:
IF ((DEST  4) + 3) is not within IDT limit THEN #GP; FI;
IF stack not large enough for a 6-byte return information THEN #SS; FI;
Push (EFLAGS[15:0]);
IF  0; (* Clear interrupt flag *)
TF  0; (* Clear trap flag *)
AC  0; (*Clear AC flag*)
Push(CS);
Push(IP);
(* No error codes are pushed *)
CS  IDT(Descriptor (vector  4), selector));
EIP  IDT(Descriptor (vector  4), offset)); (* 16 bit offset AND 0000FFFFH *)
END;
PROTECTED-MODE:
IF ((DEST  8) + 7) is not within IDT limits
OR selected IDT descriptor is not an interrupt-, trap-, or task-gate type
FI;
IF software interrupt (* generated by INTn, INT3, or INTO *)
THEN
FI;
IF gate not present THEN #NP((vector number  8) + 2 + EXT); FI;
IF task gate (* specified in the selected interrupt table descriptor *)
THEN GOTO TASK-GATE;
ELSE GOTO TRAP-OR-INTERRUPT-GATE; (* PE=1, trap/interrupt gate *)
FI;
END;
TASK-GATE: (* PE=1, task gate *)
Read segment selector in task gate (IDT descriptor);
IF local/global bit is set to local
FI;
Access TSS descriptor in GDT;
IF TSS descriptor specifies that the TSS is busy (low-order 5 bits set to 00001)
FI;
Volume 4: Base IA-32 Instruction Reference
THEN #GP((DEST  8) + 2 + EXT);
(* EXT is bit 0 in error code *)
IF gate descriptor DPL < CPL
THEN #GP((vector number  8) + 2 );
(* PE=1, DPL<CPL, software interrupt *)
FI;
OR index not within GDT limits
THEN #GP(TSS selector);
THEN #GP(TSS selector);
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