Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1765

IA-32 SSE Instruction Reference
4.1 IA-32 SSE Instructions
This section lists the IA-32 SSE instructions designed to increase performance of IA-32
3D and floating-point intensive applications. For details on SSE please refer to the
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Intel 64 and IA-32 Architectures Software Developer's Manual.
4.2 About the Intel
The Intel SSE architecture accelerates performance of 3D graphics applications over the
current P6 generation of the Pentium Pro, Pentium II and Pentium III processors. The
programming model is similar to the MMX technology model except that instructions
now operate on new packed floating-point data types which contain four
single-precision floating-point numbers.
The Intel SSE architecture introduces new general purpose floating-point instructions,
which operate on a new set of eight 128-bit SSE registers. This gives the programmer
the ability to develop algorithms that can finely mix packed single-precision
floating-point and integer using both SSE and MMX technology instructions respectively.
In addition to these instructions, the Intel SSE architecture also provides new
instructions to control cacheability of all MMX technology data types. These include
ability to stream data into and from the processor while minimizing pollution of the
caches and the ability to prefetch data before it is actually used. The main focus of
packed floating-point instructions is the acceleration of 3D geometry. The new definition
also contains additional SIMD Integer instructions to accelerate 3D rendering and video
encoding and decoding. Together with the cacheability control instruction, this
combination enables the development of new algorithms that can significantly
accelerate 3D graphics.
The new SSE state requires OS support for saving and restoring the new state during a
context switch. A new set of extended FSAVE/FRSTOR instructions will permit
saving/restoring new and existing state for applications and OS. To make use of these
new instructions, an application must verify that the processor supports the Intel SSE
architecture and the operating system supports this new extension. If both the
extension and support is enabled, then the software application can use the new
features.
The SSE instruction set is fully compatible with all software written for Intel architecture
microprocessors. All existing software continues to run correctly, without modification,
on microprocessors that incorporate the Intel SSE architecture, as well as in the
presence of existing and new applications that incorporate this technology.
Volume 4: IA-32 SSE Instruction Reference
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SSE Architecture
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