Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1580

LSL—Load Segment Limit
Opcode
0F 03 / r
0F 03 / r
Description
Loads the unscrambled segment limit from the segment descriptor specified with the
second operand (source operand) into the first operand (destination operand) and sets
the ZF flag in the EFLAGS register. The source operand (which can be a register or a
memory location) contains the segment selector for the segment descriptor being
accessed. The destination operand is a general-purpose register.
The processor performs access checks as part of the loading process. Once loaded in
the destination register, software can compare the segment limit with the offset of a
pointer.
The segment limit is a 20-bit value contained in bytes 0 and 1 and in the first 4 bits of
byte 6 of the segment descriptor. If the descriptor has a byte granular segment limit
(the granularity flag is set to 0), the destination operand is loaded with a byte granular
value (byte limit). If the descriptor has a page granular segment limit (the granularity
flag is set to 1), the LSL instruction will translate the page granular limit (page limit)
into a byte limit before loading it into the destination operand. The translation is
performed by shifting the 20-bit "raw" limit left 12 bits and filling the low-order 12 bits
with 1s.
When the operand size is 32 bits, the 32-bit byte limit is stored in the destination
operand. When the operand size is 16 bits, a valid 32-bit limit is computed; however,
the upper 16 bits are truncated and only the low-order 16 bits are loaded into the
destination operand.
This instruction performs the following checks before it loads the segment limit into the
destination register:
• Checks that the segment selector is not null.
• Checks that the segment selector points to a descriptor that is within the limits of
the GDT or LDT being accessed.
• Checks that the descriptor type is valid for this instruction. All code and data
segment descriptors are valid for (can be accessed with) the LSL instruction. The
valid special segment and gate descriptor types are given in the following table.
• If the segment is not a conforming code segment, the instruction checks that the
specified segment descriptor is visible at the CPL (that is, if the CPL and the RPL of
the segment selector are less than or equal to the DPL of the segment selector).
If the segment descriptor cannot be accessed or is an invalid type for the instruction,
the ZF flag is cleared and no value is loaded in the destination operand.
4:278
Instruction Description
Load: r16  segment limit, selector r/m16
LSL r16,r/m16
Load: r32  segment limit, selector r/m32 )
LSL r32,r/m32
Volume 4: Base IA-32 Instruction Reference