Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1873

PMOVMSKB: Move Byte Mask To Integer
Opcode
0F,D7,/r
Operation:
r32[7]
r32[5]
r32[3]
r32[1]
r32[31-8] = 0x000000;
The PMOVMSKB instruction returns a 8-bit mask formed of the most significant bits of
Description:
each byte of its source operand.
None.
Numeric Exceptions:
Protected Mode Exceptions:
#GP(0) for an illegal memory operand effective address in the CS, DS, ES, FS or GS
segments; #SS(0) for an illegal address in the SS segment; #PF (fault-code) for a page
fault; #UD if CR0.EM = 1; #NM if TS bit in CR0 is set; #MF if there is a pending FPU
exception; #AC for unaligned memory reference. To enable #AC exceptions, three
conditions must be true(CR0.AM is set; EFLAGS.AC is set; current CPL is 3).
Real Address Mode Exceptions:
Interrupt 13 if any part of the operand would lie outside of the effective address space
from 0 to 0FFFFH; #UD if CR0.EM = 1; #NM if TS bit in CR0 is set; #MF if there is a
pending FPU exception.
Virtual 8086 Mode Exceptions:
Same exceptions as in Real Address Mode; #PF (fault-code) for a page fault; #AC for
unaligned memory reference if the current privilege level is 3.
Additional Itanium System Environment Exceptions
Itanium Reg Faults
Volume 4: IA-32 SSE Instruction Reference
Instruction
PMOVMSKB r32, mm
= mm[63]; r32[6] = mm[55];
= mm[47]; r32[4] = mm[39];
= mm[31]; r32[2] = mm[23];
= mm[15]; r32[0] = mm[7];
Disabled FP Register Fault if PSR.dfl is 1
Description
Move the byte mask of MM to r32.
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