Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1549

JMP—Jump (Continued)
END;
TASK-GATE:
IF task gate DPL < CPL
OR task gate DPL < task gate segment-selector RPL
IF task gate not present THEN #NP(gate selector); FI;
IF Itanium System Environment THEN IA-32_Intercept(Gate,JMP);
Read the TSS segment selector in the task-gate descriptor;
IF TSS segment selector local/global bit is set to local
OR index not within GDT limits
OR TSS descriptor specifies that the TSS is busy
IF TSS not present THEN #NP(TSS selector); FI;
SWITCH-TASKS to TSS;
IF EIP not within code segment limit THEN #GP(0); FI;
END;
TASK-STATE-SEGMENT:
IF TSS DPL < CPL
OR TSS DPL < TSS segment-selector RPL
OR TSS descriptor indicates TSS not available
IF TSS is not present THEN #NP(TSS selector); FI;
IF Itanium System Environment THENIA-32_Intercept(Gate,JMP);
SWITCH-TASKS to TSS
IF EIP not within code segment limit THEN #GP(0); FI;
END;
Flags Affected
All flags are affected if a task switch occurs; no flags are affected if a task switch does
not occur.
Additional Itanium System Environment Exceptions
Itanium Mem FaultsVHPT Data Fault, Nested TLB Fault, Data TLB Fault, Alternate Data
IA-32_Intercept
IA_32_Exception
Protected Mode Exceptions
#GP(0)
Volume 4: Base IA-32 Instruction Reference
THEN #GP(task gate selector); FI;
THEN #GP(TSS selector); FI;
THEN #GP(TSS selector); FI;
TLB Fault, Data Page Not Present Fault, Data NaT Page Consumption
Abort, Data Key Miss Fault, Data Key Permission Fault, Data Access
Rights Fault, Data Access Bit Fault, Data Dirty Bit Fault
Gate Intercept for JMP through CALL Gates, Task Gates and Task
Segments
Taken Branch Debug Exception if PSR.tb is 1
If offset in target operand, call gate, or TSS is beyond the code
segment limits.
If the segment selector in the destination operand, call gate, task
gate, or TSS is null.
If a memory operand effective address is outside the CS, DS, ES, FS,
or GS segment limit.
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