Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1526

INTn/INTO/INT3—Call to Interrupt Procedure (Continued)
TF  0;
RF  0;
IF service through interrupt gate THEN IF  0; FI;
TempSS  SS;
TempESP  ESP;
SS:ESP  TSS(SS0:ESP0); (* Change to level 0 stack segment *)
(* Following pushes are 16 bits for 16-bit gate and 32 bits for 32-bit gates *)
(* Segment selector pushes in 32-bit mode are padded to two words *)
Push(GS);
Push(FS);
Push(DS);
Push(ES);
Push(TempSS);
Push(TempESP);
Push(TempEFlags);
Push(CS);
Push(EIP);
GS  0; (*segment registers nullified, invalid in protected mode *)
FS  0;
DS  0;
ES  0;
CS  Gate(CS);
IF OperandSize=32
THEN
ELSE (* OperandSize is 16 *)
FI;
(* Starts execution of new routine in Protected Mode *)
END;
VM86_INTERRUPT_TO_VM86:
IF IOPL = 3
THEN
ELSE
FI;
END;
INTRA-PRIVILEGE-LEVEL-INTERRUPT:
4:224
EIP  Gate(instruction pointer);
EIP  Gate(instruction pointer) AND 0000FFFFH;
push(FLAGS OR 3000H);
push(CS);
push(IP);
CS <- [N*4 + 2];
IP <- [N*4];
FLAGS <- FLAGS AND 7CD5H;
TempFlags <- FLAGS OR 3000H; (*Set IOPL to 11B or IOPL 3*)
TempFlags.IF <- EFLAGS.VIF;
push(TempFlags);
push(CS);
push(IP);
CS <- [N*4 + 2];
IP <- [N*4];
FLAGS <- FLAGS AND 77ED5H;
(*Push FLAGS w/ IOPL bits as 11B or IOPL 3*)
(*N is vector num, read from interrupt table*)
(*Clear TF and IF in EFLAGS like 8086*)
(*N is vector num, read from interrupt table*)
(*Clear VIF and TF and IF in EFLAGS like 8086*)
Volume 4: Base IA-32 Instruction Reference