Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1806

CVTTPS2PI: Packed Single-FP to Packed INT32 Conversion
(truncate)
Opcode
0F,2C,/r
Operation: mm[31-0]
mm[63-32]
The CVTTPS2PI instruction converts the lower 2 SP FP numbers in xmm/m64 to 2 32-bit
Description:
signed integers in mm; if the conversion is inexact, the truncated result is returned. If
the converted result(s) is/are larger than the maximum signed 32 bit value, the Integer
Indefinite value (0x80000000) will be returned.
None.
FP Exceptions:
Invalid, Precision.
Numeric Exceptions:
Protected Mode Exceptions:
#GP(0) for an illegal memory operand effective address in the CS, DS, ES, FS or GS
segments; #SS(0) for an illegal address in the SS segment; #PF (fault-code) for a page
fault; #UD if CR0.EM = 1; #NM if TS bit in CR0 is set; #MF if there is a pending FPU
exception; #AC for unaligned memory reference. To enable #AC exceptions, three
conditions must be true(CR0.AM is set; EFLAGS.AC is set; current CPL is 3); #XM for an
unmasked SSE numeric exception (CR4.OSXMMEXCPT =1); #UD for an unmasked SSE
numeric exception (CR4.OSXMMEXCPT =0); #UD if CRCR4.OSFXSR(bit 9) = 0; #UD if
CPUID.XMM(EDX bit 25) = 0.
Real Address Mode Exceptions:
Interrupt 13 if any part of the operand would lie outside of the effective address space
from 0 to 0FFFFH; #UD if CR0.EM = 1; #NM if TS bit in CR0 is set; #MF if there is a
pending FPU exception; #XM for an unmasked SSE numeric exception
(CR4.OSXMMEXCPT =1); #UD for an unmasked SSE numeric exception
(CR4.OSXMMEXCPT =0); #UD if CRCR4.OSFXSR(bit 9) = 0; #UD if CPUID.XMM(EDX
bit 25) = 0.
Virtual 8086 Mode Exceptions:
Same exceptions as in Real Address Mode; #AC for unaligned memory reference if the
current privilege level is 3; #PF (fault-code) for a page fault.
Additional Itanium System Environment Exceptions
Itanium Reg Faults
Itanium Mem Faults VHPT Data Fault, Data TLB Fault, Alternate Data TLB Fault, Data
4:504
Instruction
CVTTPS2PI mm, xmm/m64
= (int) (xmm/m64[31-0]);
= (int) (xmm/m64[63-32]);
Disabled FP Register Fault if PSR.dfl is 1, NaT Register
Consumption Fault
Page Not Present Fault, Data NaT Page Consumption Abort, Data
Key Miss Fault, Data Key Permission Fault, Data Access Rights
Fault, Data Access Bit Fault
Description
Convert lower 2 SP FP from XMM/Mem to 2 32-bit signed
integers in MM using truncate.
Volume 4: IA-32 SSE Instruction Reference