Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1887

A
AAA Instruction 4:21
AAD Instruction 4:22
AAM Instruction 4:23
AAS Instruction 4:24
Aborts 2:95, 2:538
ACPI 2:631
P-states 2:315, 2:637
Acquire Semantics 2:507
ADC Instruction 4:25, 4:26
ADD Instruction 4:27, 4:28
add Instruction 3:14
addp4 Instruction 3:15
ADDPS Instruction 4:486
Address Space Model 2:561
ADDSS Instruction 4:487
Advanced Load 1:153, 1:154
Advanced Load Address Table (ALAT) 1:64
Advanced Load Check 1:154
ALAT (Advanced Load Address Table) 1:64
Coherency 2:554
Data Speculation 1:17
alloc Instruction 3:16
AND Instruction 4:29, 4:30
and Instruction 3:18
andcm Instruction 3:19
ANDNPS Instruction 4:488
ANDPS Instruction 4:489
Application Architecture Guide 1:1
Application Memory Addressing Model 1:36
Application Register (AR) 1:23, 1:28, 1:140
AR (Application Register) 1:28, 1:140
Arithmetic Instructions 1:51
ARPL Instruction 4:31, 4:32
B
Backing Store 2:133
Banked General Registers 2:42
Bit Field and Shift Instructions 1:52
Bit Strings 1:84
Boot Sequence 2:13
BOUND Instruction 4:33
BR (Branch Register) 1:26, 1:140
br Instruction 3:20
br.ia 1:112, 2:596
Branch Hints 1:78, 1:176
Branch Instructions 1:74, 1:145
Branch Register (BR) 1:19, 1:26, 1:140
break Instruction 2:556, 3:29
Break Instruction Fault 2:151
brl Instruction 3:30
brp Instruction 3:32
BSF Instruction 4:35
BSP (RSE Backing Store Pointer Register) 1:29
BSPSTORE (RSE Backing Store Pointer for Memory
Index for Volumes 1, 2, 3 and 4
INDEX FOR VOLUMES 1, 2, 3 AND 4
Stores Register) 1:30
BSR Instruction 4:37
bsw Instruction 3:34
BSWAP Instruction 4:39
BT Instruction 4:40
BTC Instruction 4:42
BTR Instruction 4:44
BTS Instruction 4:46
Bundle Format 1:38
Bundles 1:38, 1:141
Byte Ordering 1:36
C
CALL Instruction 4:48
CBW Instruction 4:57
CCV (Compare and Exchange Value Register) 1:30
CDQ Instruction 4:85
CFM (Current Frame Marker) 1:27
Character Strings 1:83
Check Code 1:161
Check Load 1:154
chk Instruction 3:35
CLC Instruction 4:59
CLD Instruction 4:60
CLI Instruction 4:61
clrrrb Instruction 3:37
CLTS Instruction 4:63
clz Instruction 3:38
CMC (Corrected Machine Check) 2:350
CMC Instruction 4:64
CMCV (Corrected Machine Check Vector) 2:126
CMP Instruction 4:69
cmp Instruction 3:39
cmp4 Instruction 3:43
CMPPS Instruction 4:490
CMPS Instruction 4:71
CMPSB Instruction 4:71
CMPSD Instruction 4:71
CMPSS Instruction 4:493
CMPSW Instruction 4:71
CMPXCHG Instruction 4:74
cmpxchg Instruction 2:508, 3:46
CMPXCHG8B Instruction 4:76
Coalescing Attribute 2:78
COMISS Instruction 4:496
Compare and Exchange Value Register (CCV) 1:30
Compare and Store Data Register (CSD) 1:30
Compare Types 1:55
Context Management 2:549
Context Switching 2:557
Operating System Kernel 2:558
User-Level 2:557
Control Dependencies 1:148
Control Registers 2:29
Control Speculation 1:16, 1:60, 1:142, 1:151,
Index:1