Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1503

FYL2XP1—Compute y  log
Opcode
D9 F9
Description
Calculates the log epsilon (ST(1)  log
ST(1), and pops the FPU register stack. The source operand in ST(0) must be in the
range:

– 1 –
The source operand in ST(1) can range from  to . If either of the source operands
is outside its acceptable range, the result is undefined and no exception is generated.
The following table shows the results obtained when taking the log epsilon of various
classes of numbers, assuming that underflow does not occur:
Table 2-12.
ST(1)
Notes:
Fmeans finite-real number.
*indicates floating-point invalid-operation (#IA) exception.
This instruction provides optimal accuracy for values of epsilon [the value in register
ST(0)] that are close to 0. When the epsilon value () is small, more significant digits
can be retained by using the FYL2XP1 instruction than by using (+1) as an argument
to the FYL2X instruction. The (+1) expression is commonly found in compound interest
and annuity calculations. The result can be simply converted into a value in another
logarithm base by including a scale factor in the ST(1) source operand. The following
equation is used to calculate the scale factor for a particular logarithm base, where n is
the logarithm base desired for the result of the FYL2XP1 instruction:
Operation
ST(1)  ST(1)
PopRegisterStack;
Volume 4: Base IA-32 Instruction Reference
(x +1)
2
Instruction
FYL2XP1
2 2   to 1  2 2  
–
FYL2XP1 Zeros and NaNs
2 2 
  (1 
 + 
*
 F
* +F
 0
* +0
 0  0
*
 F  F
*
+  
*
NaN NaN NaN
log (ST(0) + 1.0);

2
Description
Replace ST(1) with ST(1)  log
register stack
(ST(0) + 1.0)), stores the result in register
2
ST(0)
)) to  0  0  0 +0 to +(1  (
* *
 0
+0
 0
+0
 0
+0
 0
+0
* *
NaN NaN
scale factor = log 2
n
(ST(0) + 1.0) and pop the
2
2 2 
+ 
)) NaN
 
NaN
 F 
NaN
 0
* NaN
+0 * NaN
+ 
+F NaN
+  + 
NaN
NaN NaN NaN
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