Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1809
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DIVPS: Packed Single-FP Divide
Opcode
0F,5E,/r
Operation:
xmm1[31-0]
xmm1[63-32]
xmm1[95-64]
xmm1[127-96] = xmm1[127-96] / (xmm2/m128[127-96]);
The DIVPS instruction divides the packed SP FP numbers of both their operands.
Description:
General protection exception if not aligned on 16-byte boundary, regardless of
FP Exceptions:
segment.
Overflow, Underflow, Invalid, Divide by Zero, Precision, Denormal.
Numeric Exceptions:
Protected Mode Exceptions:
#GP(0) for an illegal memory operand effective address in the CS, DS, ES, FS or GS
segments; #SS(0) for an illegal address in the SS segment; #PF(fault-code) for a page
fault; #UD if CR0.EM = 1; #NM if TS bit in CR0 is set; #XM for an unmasked SSE
numeric exception (CR4.OSXMMEXCPT =1); #UD for an unmasked SSE numeric
exception (CR4.OSXMMEXCPT =0); #UD if CRCR4.OSFXSR(bit 9) = 0; #UD if
CPUID.XMM(EDX bit 25) = 0.
Real Address Mode Exceptions:
Interrupt 13 if any part of the operand would lie outside of the effective address space
from 0 to 0FFFFH; #UD if CR0.EM = 1; #NM if TS bit in CR0 is set; #XM for an
unmasked SSE numeric exception (CR4.OSXMMEXCPT =1); #UD for an unmasked SSE
numeric exception (CR4.OSXMMEXCPT =0); #UD if CRCR4.OSFXSR(bit 9) = 0; #UD if
CPUID.XMM(EDX bit 25) = 0.
Virtual 8086 Mode Exceptions:
Same exceptions as in Real Address Mode; #PF(fault-code) for a page fault.
Additional Itanium System Environment Exceptions
Itanium Reg Faults
Itanium Mem Faults VHPT Data Fault, Data TLB Fault, Alternate Data TLB Fault, Data
Volume 4: IA-32 SSE Instruction Reference
Instruction
DIVPS xmm1, xmm2/m128
= xmm1[31-0]
/ (xmm2/m128[31-0]);
= xmm1[63-32]
/ (xmm2/m128[63-32]);
= xmm1[95-64]
/ (xmm2/m128[95-64]);
Disabled FP Register Fault if PSR.dfl is 1, NaT Register
Consumption Fault
Page Not Present Fault, Data NaT Page Consumption Abort, Data
Key Miss Fault, Data Key Permission Fault, Data Access Rights
Fault, Data Access Bit Fault
Description
Divide packed SP FP numbers in XMM1 by XMM2/Mem
4:507
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