Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1811
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FXRSTOR: Restore FP and Intel
State
Opcode
0F,AE,/1
Operation:
FP and MMX technology state and SSE state = m512byte;
The FXRSTOR instruction reloads the FP and MMX technology state and SSE state
Description:
(environment and registers) from the memory area defined by m512byte. This data
should have been written by a previous FXSAVE.
The FP and MMX technology and SSE environment and registers consist of the following
data structure (little-endian byte order as arranged in memory, with byte offset into
row described by right column):
15
14
Rsrvd
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
XMM0
XMM1
XMM2
XMM3
XMM4
XMM5
XMM6
XMM7
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Volume 4: IA-32 SSE Instruction Reference
®
Instruction
Description
FXRSTOR
Load FP/Intel MMX technology and SSE state from m512byte.
m512byte
13
12
11
10
9
CS
IP
MXCSR
ST0/MM0
ST1/MM1
ST2/MM2
ST3/MM3
ST4/MM4
ST5/MM5
ST6/MM6
ST7/MM7
MMX™ Technology State and SSE
8
7
6
5
4
FOP
FTW
Rsrvd
DS
3
2
1
0
FSW
FCW
DP
0
16
32
48
64
80
96
112
128
144
160
176
192
208
224
240
256
272
288
304
320
336
352
368
384
400
416
432
448
4:509
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