Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1573
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LMSW—Load Machine Status Word (Continued)
Real Address Mode Exceptions
#GP
Virtual 8086 Mode Exceptions
#GP(0)
#SS(0)
#PF(fault-code)
Volume 4: Base IA-32 Instruction Reference
If a memory operand effective address is outside the CS, DS, ES, FS,
or GS segment limit.
If the current privilege level is not 0.
If a memory operand effective address is outside the CS, DS, ES, FS,
or GS segment limit.
If a memory operand effective address is outside the SS segment
limit.
If a page fault occurs.
4:271
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