Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1287

Hide thumbs Also See for ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3:
Table of Contents

Advertisement

Rule 2. These instructions only read CFM when they access a rotating GR, FR, or PR.
mov-to-PR and mov-from-PR only access CFM when their qualifying
predicate is in the rotating region.
Rule 3. These instructions use a general register value to determine the specific indirect
register accessed. These instructions only access the register resource specified
by the value in bits {7:0} of the dynamic value of the index register.
Rule 4. These instructions only read the given resource when bits {7:0} of the indirect
index register value does not match the register number of the resource.
Rule 5. All rules are implementation specific.
Rule 6. There is a dependency only when both the index specified by the reader and
the index specified by the writer have the same value in bits {63:61}.
Rule 7. These instructions access the specified resource only when the corresponding
mask bit is set.
Rule 8. PSR.dfh is only read when these instructions reference FR32-127. PSR.dfl is
only read when these instructions reference FR2-31.
Rule 9. PSR.mfl is only written when these instructions write FR2-31. PSR.mfh is only
written when these instructions write FR32-127.
Rule 10.The PSR.bn bit is only accessed when one of GR16-31 is specified in the
instruction.
Rule 11.The target predicates are written independently of PR[qp], but source registers
are only read if PR[qp] is true.
Rule 12.This instruction only reads the specified predicate register when that register is
the PR[qp].
Rule 13.This reference to ld-c only applies to the GR whose value is loaded with data
returned from memory, not the post-incremented address register. Thus, a stop
is still required between a post-incrementing ld-c and a consumer that reads
the post-incremented GR.
Rule 14.The RSE resource includes implementation-specific internal state. At least one
(and possibly more) of these resources are read by each instruction listed in the
rse-readers class. At least one (and possibly more) of these resources are
written by each instruction listed in the rse-writers class. To determine exactly
which instructions read or write each individual resource, see the corresponding
instruction pages.
Rule 15.This class represents all instructions marked as Reserved if PR[qp] is 1 B-type
instructions as described in
Rule 16.This class represents all instructions marked as Reserved if PR[qp] is 1
instructions as described in
Rule 17.CR[TPR] has a RAW dependency only between mov-to-CR-TPR and
mov-to-PSR-l or ssm instructions that set PSR.i, PSR.pp or PSR.up.
3:388
"Format Summary" on page
"Format Summary" on page
Volume 3: Resource and Dependency Semantics
3:294.
3:294.

Advertisement

Table of Contents
loading

This manual is also suitable for:

Itanium architecture 2.3

Table of Contents