Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1091
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mux
Operation:
if (PR[qp]) {
check_target_register(r
if (one_byte_form) {
x[0] = GR[r
x[1] = GR[r
x[2] = GR[r
x[3] = GR[r
x[4] = GR[r
x[5] = GR[r
x[6] = GR[r
x[7] = GR[r
switch (mbtype) {
}
} else {
x[0] = GR[r
x[1] = GR[r
x[2] = GR[r
x[3] = GR[r
res[0] = x[mhtype8{1:0}];
res[1] = x[mhtype8{3:2}];
res[2] = x[mhtype8{5:4}];
res[3] = x[mhtype8{7:6}];
GR[r
}
GR[r
].nat = GR[r
1
}
Illegal Operation fault
Interruptions:
3:192
);
1
]{7:0};
2
]{15:8};
2
]{23:16};
2
]{31:24};
2
]{39:32};
2
]{47:40};
2
]{55:48};
2
]{63:56};
2
case '@rev':
GR[r
] = concatenate8(x[0], x[1], x[2], x[3],
1
break;
case '@mix':
GR[r
] = concatenate8(x[7], x[3], x[5], x[1],
1
break;
case '@shuf':
GR[r
] = concatenate8(x[7], x[3], x[6], x[2],
1
break;
case '@alt':
GR[r
] = concatenate8(x[7], x[5], x[3], x[1],
1
break;
case '@brcst':
GR[r
] = concatenate8(x[0], x[0], x[0], x[0],
1
break;
]{15:0};
2
]{31:16};
2
]{47:32};
2
]{63:48};
2
] = concatenate4(res[3], res[2], res[1], res[0]);
1
].nat;
2
x[4], x[5], x[6], x[7]);
x[6], x[2], x[4], x[0]);
x[5], x[1], x[4], x[0]);
x[6], x[4], x[2], x[0]);
x[0], x[0], x[0], x[0]);
// two_byte_form
Volume 3: Instruction Reference
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