Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1450

FNOP—No Operation
Opcode
D9 D0
Description
Performs no FPU operation. This instruction takes up space in the instruction stream but
does not affect the FPU or machine context, except the EIP register.
FPU Flags Affected
C0, C1, C2, C3 undefined.
Floating-point Exceptions
None.
Additional Itanium System Environment Exceptions
Itanium Reg Faults Disabled FP Register Fault if PSR.dfl is 1.
Protected Mode Exceptions
#NM
Real Address Mode Exceptions
#NM
Virtual 8086 Mode Exceptions
#NM
4:148
Instruction Description
FNOP No operation is performed.
EM or TS in CR0 is set.
EM or TS in CR0 is set.
EM or TS in CR0 is set.
Volume 4: Base IA-32 Instruction Reference