Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1251
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Table 4-52.
Bits 34:33
Table 4-53.
Bits 34:32
The branch instructions also have a 1-bit branch cache deallocation opcode hint
extension field in bit 35 (d) as shown in
Table 4-54.
4.5.1.1
IP-Relative Branch
40
B1
Instruction
br.cond. bwh . ph . dh
br.wexit. bwh . ph . dh
br.wtop. bwh . ph . dh
3:352
Branch Whether Hint Completer
wh
0
1
2
3
Indirect Call Whether Hint Completer
wh
0
1
2
3
4
5
6
7
Branch Cache Deallocation Hint Completer
d
Bit 35
0
1
37 36 35 34 33 32
4
s d wh
4
1 1
2
Operands Opcode
e
e t
target
25
e t
bwh
.sptk
.spnt
.dptk
.dpnt
bwh
.sptk
.spnt
.dptk
.dpnt
Table
4-54.
dh
none
.clr
imm
20b
20
btype
p
0
See
4
2
Table 4-51 on
page 3:351
3
13 12 11
9 8
6 5
p
btype
1
3
3
Extension
wh
d
See
See
Table 4-52 on
Table 4-54 on
page 3:352
page 3:352
Volume 3: Instruction Formats
0
qp
6
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