Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1829

MOVAPS: Move Aligned Four Packed Single-FP
Opcode
0F,28,/r
0F,29,/r
Operation: if (destination == xmm1) {
if (source == m128) {
// load instruction
xmm1[127-0] = m128;
}
else {
// move instruction
xmm1[127=0] = xmm2[127-0];
}
}
else {
if (destination == m128) {
// store instruction
m128 = xmm1[127-0];
}
else {
// move instruction
xmm2[127-0] = xmm1[127-0];
}
}
The linear address corresponds to the address of the least-significant byte of the
Description:
referenced memory data. When a memory address is indicated, the 16 bytes of data at
memory location m128 are loaded or stored. When the register-register form of this
operation is used, the content of the 128-bit source register is copied into 128-bit
destination register.
General protection exception if not aligned on 16-byte boundary, regardless of
FP Exceptions:
segment.
None
Numeric Exceptions:
Volume 4: IA-32 SSE Instruction Reference
Instruction
MOVAPS xmm1, xmm2/m128
MOVAPS xmm2/m128, xmm1
Description
Move 128 bits representing 4 packed SP data from
XMM2/Mem to XMM1 register.
Move 128 bits representing 4 packed SP from XMM1 register
to XMM2/Mem.
4:527