Intel ITANIUM ARCHITECTURE - SOFTWARE DEVELOPERS MANUAL VOLUME 1 REV 2.3 Manual page 1480

FSTENV/FNSTENV—Store FPU Environment
Opcode
9B D9 /6
D9 /6
Description
Saves the current FPU operating environment at the memory location specified with the
destination operand, and then masks all floating-point exceptions. The FPU operating
environment consists of the FPU control word, status word, tag word, instruction
pointer, data pointer, and last opcode. See the Intel
Software Developer's Manual for the layout in memory of the stored environment,
depending on the operating mode of the processor (protected or real) and the size of
the current address attribute (16-bit or 32-bit). (In virtual-8086 mode, the real mode
layouts are used.)
The FSTENV instruction checks for and handles any pending unmasked floating-point
exceptions before storing the FPU environment; the FNSTENV instruction does not.The
saved image reflects the state of the FPU after all floating-point instructions preceding
the FSTENV/FNSTENV instruction in the instruction stream have been executed.
These instructions are often used by exception handlers because they provide access to
the FPU instruction and data pointers. The environment is typically saved in the
procedure stack. Masking all exceptions after saving the environment prevents
floating-point exceptions from interrupting the exception handler.
Operation
DEST(FPUControlWord)  FPUControlWord;
DEST(FPUStatusWord)  FPUStatusWord;
DEST(FPUTagWord)  FPUTagWord;
DEST(FPUDataPointer)  FPUDataPointer;
DEST(FPUInstructionPointer)  FPUInstructionPointer;
DEST(FPULastInstructionOpcode)  FPULastInstructionOpcode;
FPU Flags Affected
The C0, C1, C2, and C3 are undefined.
Floating-point Exceptions
None.
4:178
Instruction Description
FSTENV m14/28byte Store FPU environment to m14byte or m28byte after checking
for pending unmasked floating-point exceptions. Then mask all
floating-point exceptions.
FNSTENV m14/28byte Store FPU environment to m14byte or m28byte without
checking for pending unmasked floating-point exceptions. Then
mask all floating-point exceptions.
®
64 and IA-32 Architectures
Volume 4: Base IA-32 Instruction Reference